Circuits and boards checked across every corner.
teleon.dev/docs/analog runs Ngspice and Xyce Monte Carlo analysis across process, voltage and temperature corners, and verifies KiCad Gerber files before a board goes to fabrication.
The design held its gain spec across all three corners, so its board files moved on to Gerber verification.
What it does
Two simulators
Ngspice and Xyce run Monte Carlo analysis, with Xyce suited to large parallel runs.
Every PVT corner
Samples cover process, voltage and temperature spread, so yield is measured before layout.
Gerbers verified
KiCad Gerber files are checked layer by layer before they leave for fabrication.
The contract
A run names the netlist, the corners, the sample count and the spec; the result reports yield per corner and the Gerber check.
Gerberteleon_extensible_evaluations
Endpoints
| Method | Path | Access | What it does | Status |
|---|---|---|---|---|
POST | /v1/analog/montecarlo | RING-2 | Run Monte Carlo PVT on a netlist | |
POST | /v1/analog/gerber/check | RING-2 | Verify a KiCad Gerber set | |
GET | /v1/analog/runs/{id} | RING-2 | Read yields and checks for a run |
Listed paths appear in the service’s published files today. This surface comes from the Teleon Omnibus Codex v1.0 to v50.0, Oct 25, 2026. In the one-host plan every path here is served under api.teleon.dev/v1/analog.
For agents
Give your agent the read-only guide first. It reports back before any write.
Words on this page
- PVT corners
- Combinations of process, voltage and temperature extremes that a circuit must work across.
- Monte Carlo analysis
- Many simulations with randomly varied parameters, used to estimate yield and spread.
- Gerber
- The standard file set that describes each layer of a printed circuit board for fabrication.