SINGLE-PAGE MASTER ARCHITECTURE BLUEPRINT

Full All-in-One Technical Blueprint Live at `architecture.teleon.dev`

Inspect all 320 named single-verb atomic work queues across 61 pipeline phases, 78 specialized queue categories, all 278 persistent stores (S01..S278 across 36 families & 64 core rails), 9 decision gates, 28 treatises, and live D1 seeded substrate rows on one scrollable page.

Open Master Blueprint →

End-to-End Execution & Muscle-Memory Loop

Every work item flows through five deterministic stages: lease from an Atomic Work Queue, orient and execute across three cost tiers, verify the shared result contract, persist durable state into Version-Fenced Persistent Stores & R2 CAS, and distil reusable reflexes into Dual-Resolution Muscle Memory.

STAGE 1 · ATOMIC WORK QUEUE

1. Fenced Claim + Pre-Dispatch Orientation

Workers claim an epoch-fenced lease (lease_epoch + 1) from db_atomic or file_cas queues (320 single-verb queues + aq01..aq61 control lanes + 760 domain shards). At claim time, Teleon attaches incumbent scores, negative-mutation digests, and pre-dispatch orientation in a single round-trip.

STAGE 2 · EXECUTION CONNECTOR

2. Three-Tier Dispatch (0 Calls → Hybrid → Agent-Led)

Routes each step to the cheapest verified tier: Tier 1 Deterministic (SQL, Wasm, scripts; 0 model calls), Tier 2 Hybrid Guided (1 small-model call + recalled skeleton + tools), or Tier 3 Agent-Led (deliberate multi-step reasoning).

STAGE 3 & 4 · PERSISTENT STORES + R2 CAS

3. Result Gate & Version-Fenced State Commit

Outputs pass category-specific invariants first. Durable structured state commits to teleon_mt_stores and teleon_mt_substrate_catalog (S01..S278) via expected_version CAS, while immutable bytes land in R2 under Git-blob SWHID digests.

STAGE 5 · DUAL-RESOLUTION MUSCLE MEMORY

4. 4-Path Situation Fingerprinting & Muscle-Memory Crystallization Ladder

Verified runs update two sub-millisecond indices: 4-Path Situation Fingerprinting (graduating N ≥ 3 episodes up the Muscle-Memory Crystallization Ladder into 0-call reflexes with a postcondition circuit breaker) and 5-Signal Fuzzy Cognitive-Step Recall (SimHash64 + 24-cluster concept lattice + char 3-grams).

Live Wire Endpoints Across All Cores (`api.teleon.dev`)

GET  /v1/primitives                                    # Full 6-core architectural primitives specification
GET  /v1/queues/catalog                                # 320 single-verb queues + 41 control lanes + 760 domain shards
GET  /v1/queues/categories                             # 78 domain-enforced atomic queue state machines
GET  /v1/stores/catalog                                # 278 persistent stores (S01..S278), 36 families & 64 core rails
GET  /v1/public/substrate/search?q=gltf                # 4-stage reusable substrate search (<=5 consideration set)
GET  /v1/public/sources/qualified                      # Multi-stage qualified external sources registry
PUT  /v1/tenants/:tenantId/stores/:storeId/records/:k  # Version-fenced Persistent Store CAS write (409 on stale version)
POST /v1/public/muscle-memory/steps/recall             # Zero-auth fuzzy cognitive-step recall (what_worked + what_failed_avoid)
POST /v1/public/muscle-memory/orient                   # Zero-auth 4-path task orientation + analogous_cognitive_steps

Full All-in-One Technical Blueprint Live at architecture.teleon.dev